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MBA IT, Mater in Science and Technology
Devry
Jul-1996 - Jul-2000
Professor
Devry University
Mar-2010 - Oct-2016
There are 4 caches with the organization and block size as indicated below. All caches hold 128 words where each word is 4 bytes.  Assuming a 32-bit address.
Â
a.  A direct-mapped cache with block size of 16 words
b.  2-way set-associative cache with block size of 8 words
c.  4-way set-associative cache with block size of 4 words
d.  A fully associative cache with block size of 32 words
Â
Â
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Cache a |
Cache b |
Cache c |
Cache d |
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total # bits need for word +Â byte displacement |
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# bits needed for index |
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# bits needed for tag |
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# bits (total) per set (including valid and dirty bits) |
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