Hi,

I am a Electronics student and I need help with these assignments.

The program that is used is XILINX. Please, help me

 

CET2113C – Advanced Digital CircuitsLab 3 – VHDL ALU’sObjectiveThe objective of the next two labs is to implement, in VHDL, all of the Standardcombinational circuits that are used in the implementation of a simpleMicroprocessor. These include an ALU, Multiplexer, Comparator, Tri-State Buffer.Part I: ALUUsing the ALU description in chapter 4 (along with the lecture notes), design, code,and test an ALU that implements the following functional table. First, please createthe ALU using the dataflow model (i.e. create VHDL symbols for the HA, FA, LE, AE,CE and then connect them via schematics). Also, time how long it takes you to createthe ALU using the dataflow model. After you have designed and tested the ALU usingthe dataflow model, recreate the ALU using the Behavior (i.e. Process Statement)model, and time how long that process takes:Create a simulation for both ALUs, and show the simulation result to Dr. Poe forcredit.Q1) You designed the ALU in two different ways. Which took longer, and by howmuch?Q2) If you were to construct the ALU in these two ways, which would have thebetter performance?

Attachments:

• 1495072281-Lab 3 - Arithmetic Logic Units.pdf
• 1495072282-Lab 4 - Comparators Multiplexers Tri-State Buffers.pdf