Question

 

write a C program that takes an .asm file that contains a set of MIPS instructions and then provides a diagnostic of what occurs during each cycle. 

Note that IFID, IDEX, EXMEM, MEMWB are the pipelines and are structs each containing the necessary information for each pipeline.

 

void run(){stateType state;/* Contains the state of the entire pipeline beforethe cycle executes */stateType newState;/* Contains the state of the entire pipeline afterthe cycle executes */initState(&state);/* Initialize the state of the pipeline */while (1) {printState(&state);/* If a halt instruction is entering its WB stage, then all of the legitimate *//* instruction have completed. Print the statistics and exit the program. */if (get_opcode(state.MEMWB.instr) == HALT) {printf("Total number of cycles executed: %d\n", state.cycles);/* Remember to print the number of stalls, branches, and mispredictions!*/exit(0);}newState = state;/* Start by making newState a copy of the state beforethe cycle */newState.cycles++;/* Modify newState stage-by-stage below to reflect the state of the pipelineafter the cycle has executed *//* --------------------- IF stage --------------------- *//* Setting IFIDs instruction equal to the instruction found at addressstate.PC*/newState.IFID.instr = state.instMem[(state.PC)/4];/* Setting IFID's PCPlus4 to state.PC + 4 */newState.IFID.PCPlus4 = state.PC + 4;/* Update PC */newState.PC = state.PC +4;/* --------------------- ID stage --------------------- */newState.IDEX.instr = state.instMem[(state.PC)/4];newState.IDEX.PCPlus4 = state.PC + 8;newState.IDEX.readData1 = state.regFile[(state.PC)/4];newState.IDEX.readData2 = state.regFile[(state.PC)/4];newState.IDEX.immed = state.regFile[(state.PC)/4];newState.IDEX.rsReg = state.regFile[(state.PC)/4];newState.IDEX.rtReg = state.regFile[(state.PC)/4];newState.IDEX.rdReg = state.regFile[(state.PC)/4];newState.IDEX.branchTarget = state.regFile[(state.PC)/4];/* --------------------- EX stage --------------------- */newState.EXMEM.instr = state.instrMem[(state.PC)/4];newState.EXMEM.PCPlus4 = state.PC + 12;/* --------------------- MEM stage --------------------- *//* --------------------- WB stage --------------------- */state = newState;/* The newState now becomes the old state before weexecute the next cycle */