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| Teaching Since: | Apr 2017 |
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MBA, Ph.D in Management
Harvard university
Feb-1997 - Aug-2003
Professor
Strayer University
Jan-2007 - Present
The following diagram is a fault tree analysis (FTA) of a system that consists of 3 assemblies. If the system fails, history has shown that each assembly has a certain probability of being the cause of the failure. Further, history has shown that, within each assembly, the failure could be component or workmanship. Component failures could be caused by memory, logic or passive components. Workmanship failures could be caused by opens (open circuit) or shorts (short circuits). The probability of each type of failure for each level is shown in the diagram.Â
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