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bachelor in business administration
Polytechnic State University Sanluis
Jan-2006 - Nov-2010
CPA
Polytechnic State University
Jan-2012 - Nov-2016
Professor
Harvard Square Academy (HS2)
Mar-2012 - Present
(Subtraction Logic) The truth table for a 1-bit combinational binary subtractor, analogous to the half adder, computing D(ifference) = A minus B, with BL (borrow-from-left), is

(a) Design a 1-bit combinational binary subtractor, comparable to the full adder, with two data inputs (A, B), a borrow from the right input (BI), a borrow request to the left output (BL), and a difference output (D).
(b) Show how your design can be cascaded to form multi-bit subtractors.
(c) Does the subtractor work correctly for negative two's com-plement numbers?
(d) How is a subtraction under/low condition indicated?
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