a. If we were to purchase a flip-flop circuit from an electronic component store, we may find that it has an additional input called flip .

When this input changes from a 0 to 1, the output flips state (if it was 0 it is now 1 and vice versa). However, when the flip input changes from 1 to a 0, nothing happens.

Even though we may not know the details of the circuitry needed to accomplish this behavior, we could still use this device as an abstract tool in other circuits. Consider the circuitry using two of the following flip-flops. If a pulse were sent on the circuit’s input, the bottom flip-flop would change state.

However, the second flip-flop would not change, since its input (received from the output of the NOT gate) went from a 1 to a 0. As a result, this circuit would now produce the outputs 0 and 1. A second pulse would

flip the state of both flip-flops, producing an output of 1 and 0. What would be the output after a third pulse? After a fourth pulse?

some cells in a machine’s main memory. Starting with this memory arrangement, follow the sequence of instructions and record the Output final contents of each of these memory cells: Address Contents

00 AB

01 53

02 D6

03 02

Step 1. Move the contents of the cell whose address is 03 to the cell at address 00.

Step 2. Move the value 01 into the cell at

b. It is often necessary to coordinate activities

of various components within a computer. This is accomplished by connecting a pul- sating signal (called a clock ) to circuitry similar to part a. Additional gates (as shown) will then send signals in a coordi- nated fashion to other connected circuits. On studying this circuit you should be able to confirm that on the 1 ^st , 5 ^th , 9 ^th . . . pulses of the clock, a 1 will be sent on output A. On what pulses of the clock will a 1 be sent on output B? On what pulses of the clock will a 1 be sent on output C? On which out- put is a 1 sent on the 4 ^th pulse of the clock?

address 02.

Step 3. Move the value stored at address 01 into the cell at address 03.