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MBA IT, Mater in Science and Technology
Devry
Jul-1996 - Jul-2000
Professor
Devry University
Mar-2010 - Oct-2016
Hi,
I am a Electronics student and I need help with these assignments.
The program that is used is XILINX. Please, help me
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CET2113C – Advanced Digital CircuitsLab 3 – VHDL ALU’sObjectiveThe objective of the next two labs is to implement, in VHDL, all of the Standardcombinational circuits that are used in the implementation of a simpleMicroprocessor. These include an ALU, Multiplexer, Comparator, Tri-State Buffer.Part I: ALUUsing the ALU description in chapter 4 (along with the lecture notes), design, code,and test an ALU that implements the following functional table. First, please createthe ALU using the dataflow model (i.e. create VHDL symbols for the HA, FA, LE, AE,CE and then connect them via schematics). Also, time how long it takes you to createthe ALU using the dataflow model. After you have designed and tested the ALU usingthe dataflow model, recreate the ALU using the Behavior (i.e. Process Statement)model, and time how long that process takes:Create a simulation for both ALUs, and show the simulation result to Dr. Poe forcredit.Q1) You designed the ALU in two different ways. Which took longer, and by howmuch?Q2) If you were to construct the ALU in these two ways, which would have thebetter performance?
CET2113C – Advanced Digital CircuitsLab 4 – VHDL Multiplexers, Comparators, and Tri-State BuffersObjectiveThe objective of this lab is to implement, in VHDL, all of the Standard combinationalcircuits we will be using to implement a simple Microprocessor. These include anALU, Multiplexer, Comparator, Tri-State Buffer.Part II: MultiplexerUsing the Multiplexer design from ch 4, design an 8-to-1, 8-bit wide multiplexer.Create a simulation for the Multiplexer, and show the simulation result to Dr. Poe forcredit.NOTE THIS IS NOT EXACTLY THE SAME AS THE BOOK EXAMPLE.Part III: ComparatorsUsing the Comparator design from ch 4, design an 8 bit comparator that tests, x=y,x>y, x<y.Create a simulation for the Comparators, and show the simulation result toDr. Poe for credit.NOTE THIS IS NOT EXACTLY THE SAME AS THE BOOK EXAMPLE.Part IV: Tri-State Buffer.Using the Tri-State Buffer design from ch 4, design a 16 bit wide tri-state buffer.Create a simulation for the Tri-State Buffer, and show the simulation result to Dr.Poe for credit.NOTE THIS IS NOT EXACTLY THE SAME AS THE BOOK EXAMPLE.
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