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MCS,PHD
Argosy University/ Phoniex University/
Nov-2005 - Oct-2011
Professor
Phoniex University
Oct-2001 - Nov-2016
Suppose the memory cells at addresses A4 to B1 in the machine described in Appendix C contain the (hexadecimal) bit patterns given in the following table:
|
Address |
Contents |
|
A4 |
20 |
|
A5 |
00 |
|
A6 |
21 |
|
A7 |
3 |
|
A8 |
22 |
|
A9 |
1 |
|
AA |
B1 |
|
AB |
B0 |
|
AC |
50 |
|
AD |
2 |
|
AE |
B0 |
|
AF |
AA |
|
B0 |
C0 |
|
B1 |
00 |
When answering the following questions, assume that the machine is started with its program counter containing A4.
a. What is in register 0 the first time the instruction at address AA is executed?
b. What is in register 0 the second time the instruction at address AA is executed?
c. How many times is the instruction at address AA executed before the machine halts?
Hel-----------lo -----------Sir-----------/Ma-----------dam-----------Tha-----------nk -----------You----------- fo-----------r u-----------sin-----------g o-----------ur -----------web-----------sit-----------e a-----------nd -----------and----------- ac-----------qui-----------sit-----------ion----------- of----------- my----------- po-----------ste-----------d s-----------olu-----------tio-----------n.P-----------lea-----------se -----------pin-----------g m-----------e o-----------n c-----------hat----------- I -----------am -----------onl-----------ine----------- or----------- in-----------box----------- me----------- a -----------mes-----------sag-----------e I----------- wi-----------ll