(a) Draw the block diagram for a divider that divides an 8-bit dividend by a 5-bit divisor to give a 3-bit quotient. The dividend register should be loaded when St = 1.

(b) Draw an SM chart for the control circuit.

(c) Write a VHDL description of the divider based on your SM chart. Your VHDL should explicitly generate the control signals.

(d) Give a sequence of simulator commands that would test the divider for the case 93 divided by 17.

 

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Status NEW Posted 13 May 2017 09:05 AM My Price 12.00

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