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| Teaching Since: | May 2017 |
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MCS,PHD
Argosy University/ Phoniex University/
Nov-2005 - Oct-2011
Professor
Phoniex University
Oct-2001 - Nov-2016
D 7-43.*(a) Design a synchronous counter using J-K FFs that has the follow- ing sequence: 000, 010, 101, 110, and repeat. The undesired (un-
used) states 001, 011, 100, and 111 must always go to 000 on the next clock pulse.
(b) Redesign the counter of part (a) without any requirement on the unused states; that is, their NEXT states can be don’t cares. Compare with the design from (a).
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