B.50   Assume that a gate array exists in which the logic cell used is a three-input NAND gate. The inputs to each NAND gate can be connected to either 1 or 0, or to any logic signal. Show how the following logic functions can be realized in the gate array. (Hint: Use DeMorgan’s theorem.)

(a) f  = x1x2  + x3                                              

(b) f  = x1x2x4 + x2x3x4 + x1

B.51   What logic gate is realized by the circuit in Figure PB.10? Does this circuit suffer from any major drawbacks?

 

 

x Â

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x Â

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Vf

 

Figure PB.10      Circuit for Problem B.51.

 

 

 

*B.52  What logic gate is realized by the circuit in Figure PB.11? Does this circuit suffer from any major drawbacks?

 

x Â

V

1

 

 

x Â

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Vf

 

 

 

 

Figure PB.11  Circuit for Problem B.52.