Maurice Tutor

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    Argosy University/ Phoniex University/
    Nov-2005 - Oct-2011

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    Phoniex University
    Oct-2001 - Nov-2016

Category > Management Posted 02 Nov 2017 My Price 5.00

universal shift register

(Shift-register Design) Design the basic cell of a universal shift register to the following specifications. The internal storage elements will be positive edge-triggered D flip-flops. Besides the clock, the shifter stage has two external control inputs, S0 and S1, and three external data inputs, SR, SL, and DI. SR is input data being shifted into the cell from the right, SL is data being shifted from the left, and DI is parallel-load data. The current value of the flip-flop will be replaced according to the following settings of the control signals: S0 = S1 = 0: replace D with DI; S0 = 0, S1 = 1: replace D with SL; S0 = 1, S1 = 0: replace D with SR; S0 = S1 = 1: hold the current state. Draw a schematic for this basic shifter cell

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Maurice Tutor
(5)
Status NEW Posted 02 Nov 2017 06:11 PM My Price 5.00

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