Maurice Tutor

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About Maurice Tutor

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Expertise:
Algebra,Applied Sciences See all
Algebra,Applied Sciences,Biology,Calculus,Chemistry,Economics,English,Essay writing,Geography,Geology,Health & Medical,Physics,Science Hide all
Teaching Since: May 2017
Last Sign in: 398 Weeks Ago, 2 Days Ago
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  • MCS,PHD
    Argosy University/ Phoniex University/
    Nov-2005 - Oct-2011

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  • Professor
    Phoniex University
    Oct-2001 - Nov-2016

Category > Management Posted 08 Nov 2017 My Price 4.00

DMA controller

1. A DMA controller has four channels. The controller is capable of requesting a 32-bit word every 100 μsec. A response takes equally long. How fast does the bus have to be to avoid being a bottleneck?

2. Suppose that a computer can read or write a memory word in 10 μsec. Also suppose that when an interrupt occurs, all 32 CPU registers, plus the program counter and PSW are pushed onto the stack. What is the maximum number of interrupts per second this machine can process?

 
 

Answers

(5)
Status NEW Posted 08 Nov 2017 10:11 PM My Price 4.00

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