Maurice Tutor

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Teaching Since: May 2017
Last Sign in: 399 Weeks Ago, 1 Day Ago
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  • MCS,PHD
    Argosy University/ Phoniex University/
    Nov-2005 - Oct-2011

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  • Professor
    Phoniex University
    Oct-2001 - Nov-2016

Category > Management Posted 22 Feb 2018 My Price 5.00

OI or OAI gates

Find a gate-level design for the BUT gate defined in Exercise 6.31 that uses a minimum number of transistors when realized in CMOS. You may use inverting gates with up to 4 inputs, AOI or OAI gates, transmission gates, or other transistor level tricks. Write the output expressions (which need not be two-level sums of products), and draw the logic diagram

Exercise 6.31

A possible definition of a BUT gate (Exercise 4.42) is "Y1 is l if A 1 and B1 are 1 but either A2 or B2 is O; Y2 is defined symmetrically." Write the truth table and find minimal sum-of-products expressions for the BUT-gate outputs. Draw the logic diagram for a NAND-NAND circuit for the expressions, assuming that only uncomplemented inputs are available. You may use gates from 74x00, '04, ' 10, '20, and ' 30 packages.

 

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Maurice Tutor
(5)
Status NEW Posted 22 Feb 2018 08:02 PM My Price 5.00

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