Maurice Tutor

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  • MCS,PHD
    Argosy University/ Phoniex University/
    Nov-2005 - Oct-2011

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    Phoniex University
    Oct-2001 - Nov-2016

Category > Management Posted 25 Mar 2018 My Price 2.00

header switch

Design a header switch for a power gating circuit in a 65 nm process. Suppose the pMOS transistor has an ON resistance of about 2.5 kΩ· Rm. The block being gated has an ON current of 100 mA. How wide must the header transistor be to cause less than a 2% increase in delay?

 

 

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Maurice Tutor
(5)
Status NEW Posted 25 Mar 2018 06:03 AM My Price 2.00

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