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bachelor in business administration
Polytechnic State University Sanluis
Jan-2006 - Nov-2010
CPA
Polytechnic State University
Jan-2012 - Nov-2016
Professor
Harvard Square Academy (HS2)
Mar-2012 - Present
1. How much energy is spent to execute an ADD instruction in a single-cycle design and in the 5-stage pipelined design?
2. What is the worst-case MIPS instruction in terms of energy consumption, and what is the energy spent to execute it?
3. If energy reduction is paramount, how would you change the pipelined design? What is the percentage reduction in the energy spent by an LW instruction after this change?
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