An nMOS transistor has a threshold voltage of 0.4 V and a supply voltage of V_DD = 1.2 V. A circuit designer is evaluating a proposal to reduce V_t by 100 mV to obtain faster transistors.

a) By what factor would the saturation current increase (at V_gs = V_ds = V_DD) if the transistor were ideal?

b) By what factor would the subthreshold leakage current increase at room temperature at Vgs = 0? Assume n = 1.4.

c) By what factor would the subthreshold leakage current increase at 120 °C? Assume the threshold voltage is independent of temperature.