Maurice Tutor

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Category > Computer Science Posted 14 Jul 2017 My Price 11.00

encoding for instruction

1. For the following we consider instruction encoding for instruction set architectures.

 

a. Consider the case of a processor with an instruction length of 12 bits and with 32 general-purpose registers so the size of the address fields is 5 bits. Is it possible to have instruction encodings for the following?

 

i. 3 two-address instructions

ii. 30 one-address instructions

iii. 45 zero-address instructions

 

b. Assuming the same instruction length and address field sizes as above, determine if it is possible to have

 

i. 3 two-address instructions

ii. 31 one-address instructions

iii. 35 zero-address instructions

 

Explain your answer.

 

c. Assume the same instruction length and address field sizes as above. Further assume there are already 3 two-address and 24 zero-address instructions. What is the maximum number of one-address instructions that can be encoded for this processor?

Answers

Maurice Tutor
(5)
Status NEW Posted 14 Jul 2017 09:07 PM My Price 11.00

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