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MCS,PHD
Argosy University/ Phoniex University/
Nov-2005 - Oct-2011
Professor
Phoniex University
Oct-2001 - Nov-2016
(a) Determine fmaxfor the counter of Figure 7-5(a) if tpdfor each FF is 50 ns and tpdfor each AND gate is 20 ns. Compare this value with fmaxfor a MOD-16 ripple counter.
FIGURE 7-5 Synchronous MOD-16 counter. Each FF is clocked by the NGT of the clock input signal so that all FF transitions occur at the same time.

(b) What must be done to convert this counter to MOD-32?
(c) Determine fmaxfor the MOD-32 parallel counter.
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