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MCS,PHD
Argosy University/ Phoniex University/
Nov-2005 - Oct-2011
Professor
Phoniex University
Oct-2001 - Nov-2016
Repeat Problem 13.15 for the given equations and the input sequence X = 01100.
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Problem 13.15
A sequential circuit has the form shown in Figure 13-17 with
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(a) Construct a state table and state graph for the circuit.
(b) Draw a timing diagram for the circuit showing the clock, X, Q1, Q2, Q3Â and Z. Use the input sequence X = 01011 and assume that X changes midway between falling and rising clock edges. Indicate any false outputs on the diagram.
(c) Compare the output sequence obtained from the timing diagram with that from the state graph.
(d) At what time with respect to the clock should the input be changed in order to eliminate the false output(s)?
Figure 13-17

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