Maurice Tutor

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Category > Computer Science Posted 26 Jul 2017 My Price 3.00

differential amplifier design

10.88 In a particular MOS differential amplifier design, the bias current I = 100 μA is provided by a single transistor

operating at VOV = 0.4 V with VA = 40 V and output capacitance CSS of 100 fF. What is the frequency of the common-mode gain zero  fZ  at which Acm begins to rise above its low-frequency value? To meet a requirement for reduced power supply, consideration is given to reducing VOV to 0.2 V while keeping I unchanged. Assuming the current-source capacitance to be directly proportional to the device width, what is the impact on fZ of this proposed hange?

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Status NEW Posted 26 Jul 2017 10:07 PM My Price 3.00

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